CHERI is a hardware approach to memory safety that improves system security at runtime by extending established ISAs, such as ARM, RISC-V, and x86, with new architectural features. This cross-architecture project adapts the Linux Kernel and userspace software to benefit from CHERI’s memory protection and software compartmentalization features.
Draft Specification Update and CHERI QEMU Improvements
by Paul Metzger
The RISC-V draft specification for CHERI extensions has recently been updated to version 0.9.10, introducing changes to ISA mnemonics and semantics. Tariq Kurd of Codasip presented an overview of …
Temporal Safety Development, Purecap glibc Progress and CHERI-RISC-V Renaming
by Paul Metzger
One of the major differences between the Linux fork for CHERI and CheriBSD is that the fork lacks a temporal safety subsystem. To address this, Codasip have started developing a revoker, which is …